Heterogenity-aware Scheduling Research on Performance Asymmetric Multicore Processors
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National Science Foundation for Young Scientists of China (61305054); Strategic Priority Research Program of Chinese Academy of Sciences (XDA-Y01-01)

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    Abstract:

    To meet the diverse needs of the applications, heterogeneous multicore processors appeared and entered into market, where the processing cores have a different microarchitecture or instruction set architecture (ISA), providing special features such as instruction level parallelism (ILP) and memory level parallelism (MLP). These cores work together to meet the optimization objectives of the entire computing system, such as high performance, low power consumption or energy efficiency. However, the mainstream scheduling technology is designed for the traditional homogeneous processor architecture, without considering the differences of processing capabilities of various cores. It is worth exploring for scheduling technologies that can perceive the heterogeneous characteristics of the hardware and make more suitable matching decision between applications and hardware resources. The researches of heterogeneous scheduling in recent years are systematically summarized in the paper. This paper also analyzes the scheduling challenges and techniques under the environment of performance asymmetric multicore processors from the following aspects:optimization objectives, analysis model, scheduling decision, and algorithm evaluation. Finally, the future work is prospected from the perspective of software and hardware integration.

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赵姗,杨秋松,李明树.性能非对称多核处理器下异构感知调度技术.软件学报,2019,30(4):1164-1190

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History
  • Received:January 03,2018
  • Revised:September 26,2018
  • Adopted:
  • Online: January 23,2019
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