Machine-Checked Model for Micro-Dalvik Virtual Machine
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    Abstract:

    This paper introduces Micro-Dalvik, a formalized Dalvik-like VM model to exhibit core features of the register-based architecture. This formal specification describes the instruction set and runtime state, and the runtime behaviors of the instructions as state transitions based on big-step operational semantics. The Micro-Dalvik VM instruction set is more abstract than comparable Dalvik VM to attain clarity of its semantics, but bears no further simplification of the meaning of instructions. Some properties of Micro-Dalvik VM semantics are stated based on this formal specification and sketch of the proofs is provided. This formalization is implemented in the theorem proof assistant Isabelle/HOL.

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何炎祥,江南,李清安,张军,沈凡凡.一个机器检测的Micro-Dalvik虚拟机模型.软件学报,2015,26(2):364-379

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History
  • Received:July 15,2014
  • Revised:October 31,2014
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  • Online: February 06,2015
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