The use of the cache reduces the gap between the CPU speed and the memory latency, so the cache hit ratio becomes an important factor which affects the performance of multiprocessor system. Researchers have developed a number of optimizations to enhance data locality, increase the cache hit ratio and bring the multiprocessor system performance into better play. These techniques focus on how to enhance data locality within a parallel loop, reduce and even eliminate the cache line thrashing due to true or false sharing of the cache line. Exploitation and utilization of cross-loop reuse on multiprocessors are seldom discussed. How to exploit and utilize these cross-loop reuse, and put forward some feasible and easy ways for implementation are discussed in this paper. Application of these methods can effectively increase the cache hit ratio, thus improve the performance of multiprocessor system.