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    Abstract:

    To achieve higher instruction—level parallelism, the constraint imposed by a single control flow must be relaxed. Control operations should execute in parallel just like data operations. In this paper, we present a new software pipelining method called GPMB (Global Pipelining with Multiple Branches) which is based on architectures supporting multi—way branching and multiple control flows. Preliminary experimental results show that, GPMB performs as well as modulo scheduling, and for branch—intensive loops, GPMB performs much better than software pipelining assuming the constraint of one two—way branching per cycle.

    Reference
    1 Fisher J A,Rau B R.Instruet—level parallel processing.Science, Sept.l991.253:1233~1241. 2 Jones R B,Allan V H. Software pipelining:an evaluation of enbanced pipeline. Proc. of MICRO—24, Nov.1991. 82~92. 3 Wall DW.Limits of instruction—level parallism. Proc. of 4th Int'l Conf.ASPLOS, April 1991. 4 Dehnert C, Hus P T Y, Bratt J P.Overlapped loop support in cydra—5.Proc.of the Third International Conference on Architecture of Support for Programming Language and Operating System,1989. 26~38. 5 Ebciogl K. Some design ideas for a VLIW architectures for sequential_natured software.Proc.of the IFIP WG 10.3 Working Conf.on Parallel Proeessing,1988.1~21. 6 Allen R, Kennedy K. Conversion of control dependence to data dependence.Proc.of the Tenth Annual ACM Sym- 7 Su B, Tang Z,Wang J, Zhao W.A software pipelining based VLIW architecture and optimization compiler.Proc.of MICRO—23. 8 Tang z,zhang c,zheng G,Su B.GPMB:a new software pipelining branch intensive loops.Proc.of MICRO 26, 1993. 9 Su B, Tang Z,Wang J et al.URPR—1:a single—chip VLIW architecture.EuroMicro Journal.1993. 10 Labouse J, Slavenburg G A. CREATE—LIFE:a modular design approach for High performance ASIC's.Proc.of COMPLON 1990.
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汤志忠,张赤红,陈刚.一个新的多分支全局软件流水方法.软件学报,1996,7(1):16-24

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History
  • Received:September 12,1994
  • Revised:December 02,1994
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