Microkernels migrate system services to user mode.The isolation of microkernels contributes to the reliability of the system.This advantage is in line with the needs of the aerospace feild.SPARC processors are widely applied on the control systems of spacecrafts, satellite payloads, and planetary vehicles, and the register window mechanism of SPARC will affect the performance of Inter-Process Communication(IPC) on microkernels.Besides, its Inter-Processor Interrupt(IPI) also seriously affect the efficiency of cross-core IPC.IPC is vital to the overall performance of applications on microkernels.This work redesigns and implements the register bank mechanism based on the observation of the register window.The register window is allocated and managed by the kernel,and thus the register IPC on SPARC is supported.At the same time, we design FlexIPC to optimize the performance of cross-core IPC,covering the poor performance of IPI on SPARC.We optimized the general synchronous IPC implemented on a self-developed microkernel ChCore with these approaches.Tests show that this work improves the average IPC performance of microkernels on SPARC by about 2.0× and can improve the application performance by up to 15%.