Nowadays, it has become a trend that embedded systems are designed for big data and artificial intelligence applications, which demand the large capacity and high access performance of memory. Domain wall memory (DWM) is a novel non-volatile memory with high access performance, high density, and low power consumption. Thus, for data-intensive applications specific embedded systems, DWM can meet the requirements of access speed, capacity, and power consumption. However, before accessing data on DWM, data in nanowires need to be shifted to align them with read/write port, which is called shift operation. Numerous shift operations take most of time and generate much quantity of heat when accessing data on DWM. It will decrease the access speed of DWM and system performance further. In that case, reducing shift operations of DWM can significantly improve the system performance. This study aims at data-intensive application specific embedded systems with multi-port DWM, and explores optimal instruction schedule and data placement strategy which achieve minimum shift operations. An integer linear programming (ILP) model is firstly proposed to obtain minimum number of shifts. Since ILP model cannot find the optimal solution in polynomial time, a heuristic algorithm is proposed to reduce the number of shifts on DWM—generation instruction scheduling and data placement (GISDP) algorithm. The experimental results show that ILP model and GISDP algorithm can effectively reduce shift operation. On target system with 8 read/write ports DWM, GISDP can reduce shift operations by 89.7% on average when compared with other algorithms, and the results of GISDP are close to the optimal solutions of ILP.