SIMD自动向量化编译优化概述
作者:
基金项目:

“核高基”国家科技重大专项(2009ZX01036-001-001-2)


Research on SIMD Auto-Vectorization Compiling Optimization
Author:
  • 摘要
  • | |
  • 访问统计
  • |
  • 参考文献 [77]
  • |
  • 相似文献 [20]
  • |
  • 引证文献
  • | |
  • 文章评论
    摘要:

    SIMD扩展部件是集成到通用处理器中的加速部件,旨在发掘多媒体程序和科学计算程序的数据级并行.首先介绍SIMD扩展部件的背景和研究现状,然后从发掘方法、数据布局、多平台向量化这3个角度介绍了SIMD自动向量化的研究问题、困难和最新研究成果,最后展望了SIMD编译优化未来的研究方向.

    Abstract:

    SIMD extension is an acceleration component integrated into the general processor for developing data level parallelism in multimedia and scientific computing applications. Firstly, in this study the background and research status of SIMD extension are introduced. Next, challenges and latest research achievements in SIMD auto-vectorization are discussed from three perspectives: development method, data layout and vectorization in multi-platform. Finally, some future trends in the SIMD compiling optimization are addressed.

    参考文献
    [1] Furtak T, Amaral JN, Niewiadomski R. Using SIMD registers and instructions to enable instruction-level parallelism in sorting algorithms.In: Proc. of 19th Annual ACM Symp. on Paralleism in Algorithms and Architectures (SPAA). 2007. [doi: 10.1145/ 1248377.1248436]
    [2] Schlegel B, Gemulla R, Lehner W. Fast integer compression using SIMD instructions. In: Proc. of the 6th Int'l Workshop on Data Management on New Hardware (DaMoN). 2010. [doi: 10.1145/1869389.1869394]
    [3] Hayes T, Palomar O, Unsal O, Cristal A, Valero M. Vector extensions for decision support DBMS acceleration. In: Proc. of the 45th Annual Int'l Symp. on Microarchitecture. 2012. [doi: 10.1109/MICRO.2012.24]
    [4] Shou YX, van Engelen RA. Automatic SIMD vectorization of chains of recurrences. In: Proc. of the 22nd Int'l Conf. on Supercomputing (ICS). 2008. [doi: 10.1145/1375527.1375564]
    [5] Stepanov AA, Gangolli AR, Rose DE, Ernst RJ, Oberoi PS. SIMD-Based decoding of posting lists. In: Proc. of the 20th ACM Int'l Conf. on Information and Knowledge Management (CIKM). Glasgow, 2011. 317-326. [doi: 10.1145/2063576.2063627]
    [6] Sompolski1 J, Zukowski M, Boncz P. Vectorization vs. compilation in query execution. In: Proc. of the 7th Int'l Workshop on Data Management on New Hardware (DaMoN). Athens, 2011. [doi: 10.1145/1995441.1995446]
    [7] Rohou E, Williams K, Yuste D. Vectorization technology to improve interpreter performance. ACM Trans. on Architecture and Code Optimization (TACO), 2013,9(4):Article 26. [doi: 10.1145/2400682.2400685]
    [8] Esterie P, Gaunard M, Falcou J, Laprest JT, Rozoy B. Boost. SIMD: Generic programming for portable SIMDization. In: Proc. of the 2012 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2012. [doi: 10.1145/2370816.2370881]
    [9] Wang H, Andrade H, Gedik B, Wu KL. A code generation approach for auto-vectorization in the spade compiler. In: Proc. of the 21st Int'l Workshop on Languages and Compilers for Parallel Computing (LCPC). Berlin: Springer-Verilog, 2009. 383-390. [doi: 10.1007/978-3-642-13374-9_26]
    [10] Kretz M, Lindenstruth V. Vc: A C++ Library For Explicit Vectorization. Software: Practice and Experience, 2011.
    [11] Leißa R, Hack S, Wald I,. Extending a C-like language for portable SIMD programming. In: Proc. of the 17th ACM SIGPLAN Symp. on Principles and Practices of Parallel Programming (PPoPP). New Orleans, 2012. [doi: 10.1145/2145816.2145825]
    [12] Lokhmotov A, Gaster BR, Mycroft A, Hickey N, Stuttard D. Revisiting SIMD programming. In: Proc. of the 19th Int'l Workshop on Languages and Compilers for Parallel Computing (LCPC). Berlin: Springer-Verilog, 2007. 32-46. [doi: 10.1007/978-3-540- 85261-2_3]
    [13] Sreraman N, Govindarajan R. A vectorizing compiler for multimedia extensions. Int'l Journal of Parallel Programming, 2000,28(4): 363-400. [doi: 10.1023/A:1007559022013]
    [14] Zhang WH, Zang BY. SIMD compiling technology review. Communications of the CCF, 2007,3(2):27-36 (in Chinese).
    [15] Ren G, Wu P, Padua D. A preliminary study on the vectorization of multimedia applications for multimedia extensions. In: Proc. of the 16th Int'l Workshop on Languages and Compilers for Parallel Computing (LCPC). Berlin: Springer-Verilog, 2004. 420-435. [doi: 10.1007/978-3-540-24644-2_27]
    [16] Allen R, Kennedy K. Automatic translation of Fortran programs to vector form. ACM Trans.on Programming Languages and Systems, 1987,9(4):491-542. [doi: 10.1145/29873.29875]
    [17] Bik AJC. Applying multimedia extensions for maximum performance. In: The Software Vectorization Handbook. Intel Press, 2004.
    [18] Hampton M, Asanovic K. Compiling for vector-thread architectures. In: Proc. of the 6th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO). 2008. [doi: 10.1145/1356058.1356085]
    [19] Iwasawa K, Mycroft A. Choosing method of the most effective nested loop shearing for parallelism. In: Proc. of the 8th Int'l Conf. on Parallel and Distributed Comuputing, Applications and Technologies (PDCAT). 2007. 267-276. [doi: 10.1109/PDCAT.2007.44]
    [20] Nuzman D, Zaks A. Outer-Loop vectorization—revisited for short SIMD architectures. In: Proc. of the 2008 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2008. [doi: 10.1145/1454115.1454119]
    [21] Trifunovic K, Nuzman D, Cohen A, Zaks A, Rosen I. Polyhedral-Model guided loop-nest auto-vectorization. In: Proc. of the 2009 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2009. [doi: 10.1109/PACT.2009.18]
    [22] Kong M, Veras R, Stock K, Franchetti F, Poucher LN, Sadayappan P. When polyhedral transformations meet SIMD code generation. In: Proc. of the 2013 Conf. on Programming Language Design and Implementation (PLDI). 2013. [doi: 10.1145/ 2491956.2462187]
    [23] Stock K, Poudhet LN, Sadayappan P. Using machine learning to improve automatic vectorization. ACM Trans. on Architecture and Code Optimization (TACO), 2012,8(4):Article 50. [doi: 10.1145/2086696.2086729]
    [24] Vasilache N, Meister B, Baskaran M, Lethin R. Joint scheduling and layout optimization to enable multi-level vectorization. In: Proc. of the Int'l Workshop on Polyhedral Compilation Techniques (IMPACT). 2012.
    [25] Kong M, Pouchet LN, Sadayappan P. Abstract vector SIMD code generation using the polyhedral model. Technical Report, 4/13-TR08, Ohio State University, 2013.
    [26] Larsen S, Amarasinghe S. Exploiting superword level parallelism with multimedia instruction sets. In: Proc. of the Conf. on Programming Language Design and Implementation (PLDI). 2000. 145-156. [doi: 10.1145/349299.349320]
    [27] Tenllado C, Piuel L, Prieto M, Tirado F, Catthoor F. Improving superword level parallelism support in modern compilers. In: Proc. of the 3rd IEEE/ACM/IFIP Int'l Conf. on Hardware/Software Codesign and System Synthesis. 2005. [doi: 10.1145/1084834. 1084909]
    [28] Barik R, Zhao JS, Sarkar V. Efficient selection of vector instructions using dynamic programming. In: Proc. of the 43rd Annual IEEE/ACM Int'l Symp. on Microarchitecture (MICRO). 2010. [doi: 10.1109/MICRO.2010.38]
    [29] Leupers R. Code selection for media processors with SIMD instructions. In: Proc. of the Conf. on Design, Automation and Test in Europe (DATE). 2000. 4-8. [doi: 10.1109/DATE.2000.840007]
    [30] Liu J, Zhang YR, Kandemir M. A compiler framework for extracting superword level parallelism. In: Proc. of the 2012 Conf. on Programming Language Design and Implementation (PLDI). 2012. [doi: 10.1145/2254064.2254106]
    [31] Hiroaki T, Takeuchi Y, Sakanushi K, Imai M, Ota Y, Matsumoto N, Nakagawa M. Pack instruction generation for media processors using multi-valued decision diagram. In: Proc. of the 4th Int'l Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS). 2006. 154-159. [doi: 10.1145/1176254.1176292]
    [32] Rosen I, Nuzman D, Zaks A. Loop-Aware SLP in GCC. In: Proc. of the GCC Developers' Summit. 2007. 131-142.
    [33] Shin J. SIMD programming by expansion. In: Proc. of the 21st Int'l Workshop on Languages and Compilers for Parallel Computing (LCPC). 2009.
    [34] Karrenberg R, Hack S. Hack whole-function vectorization. In: Proc. of the 9th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO). 2011. [doi: 10.1109/CGO.2011.5764682]
    [35] Tanaka H, Ota Y, Matsumoto N, Hieda T, Takeuchi Y, Imai M. A new compilation technique for SIMD code generation across basic block boundaries. In: Proc. of the 15th Asia and South Pacific Design Automation Conf. (ASP-DAC). 2010. 101-106. [doi: 10.1109/ASPDAC.2010.5419911]
    [36] Allen JR, Kennedy K, Porterfield C, Warren J. Conversion of control dependence to data dependence. In: Proc. of the 20th Annual ACM SIGPLAN-SIGACT Symp. on Principles of Programming Languages (POPL). New York: ACM Press, 1983. 177-189. [doi: 10.1145/567067.567085]
    [37] Allen R, Kennedy K. Optimizing Compilers for Modern Architectures: A Dependence-Based Approach. Burlington: Morgan Kaufmann Publishers, 2001.
    [38] Park J, Schlansker M. On predicated execution. Technical Report, HPL-91-58, Software and Systems Laboratory, 1991.
    [39] Shin J, Hall M, Chame J. Superword-Level parallelism in the presence of control flow. In: Proc. of the 3rd Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO). New York: ACM Press, 2005. 165-175. [doi: 10.1109/CGO.2005.33]
    [40] Smith JE, Faanes G, Sugumar R. Vector instruction set support for conditional operations. In: Proc. of the 27th Annual Int'l Symp. on Computer Architecture. Vancouver, 2000. 260-269. [doi: 10.1145/339647.339693]
    [41] Shin J. Introducing control flow into vectorized code. In: Proc. of the 16th Int'l Conf. on Parallel Architecture and Compilation Techniques (PACT). Washington: IEEE Computer Society, 2007. 280-291. [doi: 10.1109/PACT.2007.4336219]
    [42] Shin J, Hall M, Chame J. Evaluating compiler technology for control-flow optimizations for multimedia extension architectures. Microproesrs & Mircrosystems, 2009,33(4):235-243. [doi: 10.1016/j.micpro.2009.02.002]
    [43] Zhu JF, Zhao RC. A vectorization method of export branch for SIMD extension, In: Proc. of the 10th Conf. IEEE/ACIS Int'l Conf. on Computer and Information Science (ICIS). 2011. [doi: 10.1109/ICIS.2011.49]
    [44] von Dincklage D, Diwan A. Explaining failures of program analyses. In: Proc. of the 2008 ACM SIGPLAcreasing and detecting memory address congruence. In: Proc. of the 2002 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2002. 18-29. [doi: 10.1109/PACT.2002.1105970]
    [72] Wei S. Research of SIMD vectorization algorithm and regroup technology [Ph.D. Thesis]. Zhengzhou: Information Engineering University, 2012 (in Chinese with English abstract).
    [73] Chang H, Sung W. Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware. In: Proc. of the 2008 Int'l Conf. on Compilers, Architectures and Synthesis for Embedded Systems (CASES). 2008. 167-176. [doi: 10.1145/ 1450095.1450121]
    [74] Nuzman D, Rosen I, Zaks A. Auto-Vectorization of interleaved data for SIMD. In: Proc. of the ACM SIGPLAN 2006 Conf. on Programming Language Design and Implementation (PLDI). 2006. 132-143. [doi: 10.1145/1133981.1133997]
    [75] Naishlos D, Biberstein M, Ben-David S, Zaks A. Vectorizing for a SIMdD DSP architecture. In: Proc. of the 2003 Int'l Conf. on Compilers, Architecture and Synthesis for Embedded Systems (CASES). 2003. [doi: 10.1145/951710.951714]
    [76] Lee RB. Subword permutation instructions for two-dimensional multimedia processing in micro SIMD architectures. In: Proc. of the 2000 Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). 2000. 3-14.
    [77] McGregor JP, Lee RB. Architectural techniques for accelerating subword permutations with repetitions. In: IEEE Trans. on Very Large Scale Integration (VLSI) Systems. 2003. 325-335. [doi: 10.1109/TVLSI.2003.812318]
    [78] Hanounik B, Hu XB. Linear-Time matrix transpose algorithms using vector register file with diagonal registers. In: Proc. of the Int'l Conf. on Parallel and Distributed Processing Symposium (IPDPS). 2001. 23-27. [doi: 10.1109/IPDPS.2001.924973]
    [79] Shahbarami A, Juurlink B, Vassiliadis S. Matrix register file and extended subwords: Two techniques for embedded media processors. In: Proc. of the Conf. Computing Frontiers. 2005. 171-179. [doi: 10.1145/1062261.1062291]
    [80] Kudriavtsev A, Kogge P. Generation of permutations for SIMD processors. In: Proc. of the 2005 ACM Conf. on Languages, Compilers, and Tools for Embedded Systems (LCTES). 2005. 147-156. [doi: 10.1145/1065910.1065931]
    [81] Franchetti F, Püschel M. Generating SIMD vectorized permutations. In: Proc. of the Joint European Conf. on Theory and Practice of Software 17th Int'l Conf. on Compiler Construction. Budapest, 2008. [doi: 10.1007/978-3-540-78791-4_8]
    [82] Ren G, Wu P, Padua DA. Optimizing data permutations for SIMD devices. In: Proc. of the 2006 ACM SIGPLAN Conf. on Programming Language Design and Implementation (PLDI). 2006. 118-131. [doi: 10.1145/1133981.1133996]
    [83] Huang L, Shen L, Wang ZY, Shi W, Xiao N, Ma S. SIF: Overcoming the limitations of SIMD devices via implicit permutation. In: Proc. of the 16th Int'l Symp. on High-Performance Computer Architecture (HPCA). 2010. 355-366. [doi: 10.1109/HPCA.2010. 5416631]
    [84] Shen L, Huang L, Xiao N, Wang Z. Implicit data permutation for simd devices. In: Proc. of the 4th Int'l Conf. on Embedded and Multimedia Computing. 2009. 1-6. [doi: 10.1109/EM-COM.2009.5403000]
    [85] Li YX, Shi H, Chen L. Vectorization-Oriented local data regrouping. Computer System, 2009,30(8):1529-1534 (in Chinese with English abstract).
    [86] Kim S, Han H. Efficient SIMD code generation for irregular kernels. In: Proc. of the 17th ACM SIGPLAN Symp. on Principles and Practices of Parallel Programming (PPoPP). 2012. [doi: 10.1145/2145816.2145824]
    [87] Ren B, Agrawal G, Mytkowicz T, Poutanen T. Wolfram schulte fine-grained parallel traversals of irregular data structures. In: Proc. of the 2012 Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2012. [doi: 10.1145/2370816.2370896]
    [88] Shin J, Chame J, Hall MW. Compiler-Controlled caching in superword register files for multimedia extension architectures. In Proc. of the 11th Int'l Conf. on Parallel Architectures and Compilation Techniques (PACT). 2002. 45-55. [doi: 10.1109/PACT.2002. 1106003]
    [89] Shin J, Chame J, Hall MW. Exploiting superword-level locality in multimedia extension architectures. JILP, 2003.
    [90] Nuzman D, Namolaru M, Zaks A, Derby JH. Compiling for an indirect vector register architecture. In: Proc. of the CF. 2008. [doi: 10.1145/1366230.1366266]
    [91] Lesnicki P, Cohen A, Fursin G, Cornero M, Ornstein A, Rohou E. Split compilation: An application to just-in time vectorization. In: Proc. of the Workshop on GCC for Research in Embedded and Parallel Systems (GREPS). Brasov, 2007.
    [92] Nuzman D, Henderson R. Multi-Platform auto-vectorization. In: Proc. of the 4th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO). 2006. 281-294. [doi: 10.1109/CGO.2006.25]
    [93] Nuzman D, Dyshel S, Rohou E, Rosen I. Vapor SIMD: Auto-Vectorize once, run everywhere. In: Proc. of the 9th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO). 2011. [doi: 10.1109/CGO.2011.5764683]
    [94] Costa R, Ornstein AC, Rohou E. CLI back-end in GCC. In: Proc. of the GCC Developers' Summit. Ottawa, 2007. 111-116.
    [95] El-Shobaky S, El-Mahdy A, El-Nahas A. Automatic vectorization using dynamic compilation and tree pattern matching technique in Jikes RVM. In: Proc. of the 4th Workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages and Programming Systems (ICOOOLPS). 2009. 63-69. [doi: 10.1145/1565824.1565833]
    [96] Hohenauer M, Schumacher C, Leupers R, Ascheid G, Meyr H, van Someren H. Retargetable code optimization with SIMD instructions. In: Proc. of the 4th Int'l Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS). 2006. [doi: 10.1145/1176254.1176291]
    [97] Wu P, Eichenberger AE, Wang A, Zhao P. An integrated simdization framework using virtual vectors. In: Proc. of the 19th Annual Int'l Conf. on Supercomputing. 2005. [doi: 10.1145/1088149.1088172]
    [98] Jr. Bocchino RL, AdveVector VS. Vector LLVA: A virtual vector instruction set for media processing. In: Proc. of the 2nd Int'l Conf. on Virtual Eexecution Environments (VEE). 2006.
    [99] Jeon D, Garcia S, Louie C, Taylor MB. Kismet: Parallel speedup estimates for serial programs. In: Proc. of the 26th Annual ACM SIGPLAN Conf. on Object-Oriented Programming Systems, Languages, and Applications (OOPSLA). 2011. [doi: 10.1145/ 2048066.2048108]
    [100] Peng F, Gu NJ, Gao X, Sun MM. SIMD compiler optimization and analysis based on Godson-3B processor. Journal of Chinese Computer Systems, 2012,33(12):2733-2737 (in Chinese with English abstract).
    [101] Xin NJ, Chen XC, Sun HY, Yang L, Luo J, Dan XQ, Wang J. Extending the vector instruction set for high-performance DSP matrix based on GCC. Computer Engineering & Science, 2012,34(1):57-63 (in Chinese with English abstract).
    [102] Xu HY, Zheng QL, Ding CF, Xu DP. Vectorization algorithm for multi-cluster and VLIW DSP. Computer Application & System, 2013, 22(12):140-143 (in Chinese with English abstract).
    [103] Hassaballah M, Omran S, Mahdy YB. A review of SIMD multimedia extensions and their usage in scientific and engineering applications. The Computer Journal, 2008,51(6):630-650. [doi: 10.1093/comjnl/bxm099]
    [104] Ramachandran A, Vienne J, van der Wijngaart R, Koesterke L, Sharapov I. Performance evaluation of NAS parallel benchmarks on Intel Xeon Phi. In: Proc. of the 42nd Int'l Conf. on Parallel Processing (ICPP). 2013. [doi: 10.1109/ICPP.2013.87]???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????
    引证文献
    网友评论
    网友评论
    分享到微博
    发 布
引用本文

高伟,赵荣彩,韩林,庞建民,丁锐. SIMD自动向量化编译优化概述.软件学报,2015,26(6):1265-1284

复制
分享
文章指标
  • 点击次数:
  • 下载次数:
  • HTML阅读次数:
  • 引用次数:
历史
  • 收稿日期:2014-04-08
  • 最后修改日期:2014-12-22
  • 在线发布日期: 2015-02-04
文章二维码
您是第19727868位访问者
版权所有:中国科学院软件研究所 京ICP备05046678号-3
地址:北京市海淀区中关村南四街4号,邮政编码:100190
电话:010-62562563 传真:010-62562533 Email:jos@iscas.ac.cn
技术支持:北京勤云科技发展有限公司

京公网安备 11040202500063号