In this paper, the analysis model of computer clock is discussed, and the characteristic of the existing synchronization mechanisms is summarized. Subsequently, a unidirectional reference broadcast synchronization mechanism with low power is developed, and this mechanism can achieve simultaneously the offset compensation and drift compensation. Its implementation algorithm is designed based on the principle of traditional phase locked loop (PLL). In order to avoid introducing the extra hardware, a simple digital PLL is constructed. Finally, the validation is done on the Mica2 experimental platform, and the performance is evaluated and compared with the typical algorithms.