A new run-time pointer aliasing disambiguation method, SHRTD, combined with software and hardware techniques, can be used for irreversible code and has very limited compensation code space and no serious rerollability problem. In this paper, instruction-level parallel speedups of the SHRTD method are analyzed in detail. Speedups and mean speedups where address conflicts occurred and speedups where address conflicts will occur according to their probabilities are given. Three theoretical speedups introduced in this paper are very useful for studying and evaluating instruction-level parallel compiling techniques.