In order to deal with the memory bottleneck in high level synthesis tools for sliding-window operation, this paper presents a parameterized memory architecture for high level synthesis to automatically generate the hardware frames for all window processing applications. A three-level memory structure is designed to use inner-loop and outer-loop data completely, and at the same time shifted registers are used to make hardware design simpler. Compared with the related works, this approach can achieve a speedup of 2.13 to 3.8 times, and enhance the execution frequency from 69MHZ to 238.7MHZ.