Finding obstacle-avoiding shortest path is an important problem in VLSI design, and connection graph is a fundamental tool to resolve the problem. The known best graph grounded on knowledge of free area, and it has O(t) vertices and O(tlogt) edges, in which t is the number of extreme edges of the obstacles. In this paper, a generalized connection graph G_G is introduced, which is derived from some new conception such as generalized free area. G_G is made up with vertex that represents the generalized free area and edges for their adjacency. It has only Θ(t) vertices and Θ(t) edges, and it is planar graph. An O(tlogt) time algorithm using plane scanning is designed to construct G_G, and the do not change direction heuristic together with A^* algorithm is used for getting the shortest obstacle-avoiding path using G_G through the conception of formal path. This algorithm shorten the time complexity from O(tlogt)to Θ(t).