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| 刘利,李文龙,陈彧,李胜梅,汤志忠.软件流水中隐藏存储延迟的方法.软件学报,2005,16(10):1833-1841 |
| 软件流水中隐藏存储延迟的方法 |
| Hiding Memory Access Latency in Software Pipelining |
| 投稿时间：2004-09-30 修订日期：2005-06-02 |
| DOI： |
| 中文关键词: 软件流水 模调度 存储延迟 FLMS(foresightedlatency modulo scheduling) |
| 英文关键词:software pipeline modulo scheduling memory access latency FLMS (foresighted latency modulo scheduling) |
| 基金项目:Supported by the National Natural Science Foundation of China under Grant No.60573100(国家自然科学基金) |
| 作者 | 单位 | | 刘利 | 清华大学,计算机科学与技术系,北京,100084 | | 李文龙 | Intel中国研究中心,编译组,北京,100080 | | 陈彧 | 清华大学,计算机科学与技术系,北京,100084 | | 李胜梅 | 清华大学,计算机科学与技术系,北京,100084 | | 汤志忠 | 清华大学,计算机科学与技术系,北京,100084 |
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| 中文摘要: |
| 软件流水是一种重要的指令调度技术,它通过同时执行来自不同循环体的指令来加快循环的执行速度.随着处理机运行速度的逐渐提高,存储访问延迟成为性能提高的瓶颈.为了减轻存储系统影响,软件流水结合了一些存储优化技术,通过隐藏存储延迟来提高性能.提出了一种延迟可预测的模调度算法(foresighted latencymodulo scheduling,简称FLMS),它根据循环的特点来确定load指令延迟.实验结果表明,FLMS算法减少了阻塞时间,提高了程序性能. |
| 英文摘要: |
| Software pipelining tries to improve the performance of a loop by overlapping the execution of several successive iterations. As processor gets much higher speed, the memory access latency becomes a bottleneck that restricts higher performance. Software pipelining has been combined with several memory optimization technologies for higher performance by hiding memory access latency. This paper presents a foresighted latency modulo scheduling (FLMS) algorithm which determines the latency of load instructions according to the feature of the loop. Experimental results show that FLMS decreases the stall time and improves the performance of programs. |
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