提出了比特平面与编码过程全并行处理的EBCOT(embedded block coding with optimizedtruncation)编码结构.通过分析JPEG2000和国内外提出的EBCOT编码结构,指出不仅每一个比特平面,而且对应的编码过程的编码信息可以同时获得,从而给出了比特平面与编码过程全并行处理的块编码方法,并且详细说明了实现的VLSI结构.理论分析以及具体实验结果表明,比特平面与编码过程全并行处理所需的时钟周期最少,FPGA原型系统最高时钟频率可达65MHz,对于512×512的灰度图像,处理速度可达30fps,完全可以实时处理,图像质量达到了公布的JPEG2000标准.

This paper proposes an efficient architecture composed of bit plane-parallel and pass-parallel coder for EBCOT (embedded block coding with optimized truncation) entropy encoder used in JPEG2000.After the detailed analysis of EBCOT architecture in JPEG2000, the coding information of each bit plane and the corresponding passes can be obtained simultaneously. Therefore, bit plane-parallel and pass-parallel coding (BPPP) is proposed, and its VLSI architecture is shown in details. The analysis and the corresponding experimental results show that the proposed architecture reduces the processing time greatly compared with others, and a FPGA prototype chip is designed and can process 512×512 gray level images with 30 frames per second at 65MHz working frequency. The quality of images reaches the results released by JPEG2000.

Supported by the National High-Tech Research and Development Plan of China under Grant No.2003AA1ZB10 (国家高技术研究发展计划(863))